Burst cellular ram controller (bcramc), 1 description – Rainbow Electronics AT91CAP9S250A User Manual

Page 245

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245

6264A–CAP–21-May-07

AT91CAP9S500A/AT91CAP9S250A

24. Burst Cellular RAM Controller (BCRAMC)

24.1

Description

The Burst Cellular RAM Controller (BCRAMC) is a synchronous pseudo-static RAM memory
controller, it supports Cellular Ram device version 1.0, 1.5 and 2.0.

The BCRAMC extends the memory capabilities of a chip by providing the interface to an external
16- or 32-bit Cellular Ram device. The page size support ranges from 64 to 512. It supports
byte, half-word and word accesses.

The BCRAMC supports continuous read or write burst. It supports a latency of 2, 3 for Cellular
Ram version 1.0 and a latency of 2, 3, 4, 5, 6 for Cellular Ram version 1.5 and 2.0 and opti-
mizes the read/write access depending on the frequency.

Standby and deep power down modes minimize power consumption on the Cellular Ram
device.

The BCRAMC user interface is compliant with the ARM Advanced Peripheral Bus (APB rev2).

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