Rainbow Electronics AT91CAP9S250A - Manual (Page 465)

465
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
33.6.3.3 Clock Generation
The SPI Baud rate clock is generated by dividing the Master Clock (MCK) , by a value
between 1 and 255.
This allows a maximum operating baud rate at up to Master Clock and a minimum operating
baud rate of MCK divided by 255.
Programming the SCBR field at 0 is forbidden. Triggering a transfer while SCBR is at 0 can
lead to unpredictable results.
At reset, SCBR is 0 and the user has to program it at a valid value before performing the first
transfer.
The divisor can be defined independently for each chip select, as it has to be programmed in
the SCBR field of the Chip Select Registers. This allows the SPI to automatically adapt the
baud rate for each interfaced peripheral without reprogramming.
33.6.3.4 Transfer Delays
Figure 33-7 shows a chip select transfer change and consecutive transfers on the same chip
select. Three delays can be programmed to modify the transfer waveforms:
• The delay between chip selects, programmable only once for all the chip selects by writing
the DLYBCS field in the Mode Register. Allows insertion of a delay between release of one
chip select and before assertion of a new one.
• The delay before SPCK, independently programmable for each chip select by writing the
field DLYBS. Allows the start of SPCK to be delayed after the chip select has been
asserted.
• The delay between consecutive transfers, independently programmable for each chip
select by writing the DLYBCT field. Allows insertion of a delay between two transfers
occurring on the same chip select
These delays allow the SPI to be adapted to the interfaced peripherals and their speed and
bus release time.
Figure 33-7. Programmable Delays
33.6.3.5 Peripheral Selection
The serial peripherals are selected through the assertion of the NPCS0 to NPCS3 signals. By
default, all the NPCS signals are high before and after each transfer.
The peripheral selection can be performed in two different ways:
DLYBCS DLYBS DLYBCT DLYBCT
Chip Select 1
Chip Select 2
SPCK