4 dmac software chunk transfer request register, 5 dmac software last transfer flag register – Rainbow Electronics AT91CAP9S250A User Manual
Page 315
315
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
26.5.4
DMAC Software Chunk Transfer Request Register
Name: DMAC_CREQ
Access: Read/Write
Reset Value: 0x00000000
• DCREQ[i]
Request a destination chunk transfer on channel i.
• SCREQ[i]
Request a source chunk transfer on channel i.
26.5.5
DMAC Software Last Transfer Flag Register
Name: DMAC_LAST
Access: Read/Write
Reset Value: 0x00000000
• DLAST[i]
Writing one to DLAST[i] prior to writing one to DSREQ[i] or DCREQ[i] indicates that this destination request is the last trans-
fer of the buffer.
• SLAST[i]
Writing one to SLAST[i] prior to writing one to SSREQ[i] or SCREQ[i] indicates that this source request is the last transfer of
the buffer.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
DCREQ3
SCREQ3
DCREQ2
SCREQ2
DCREQ1
SCREQ1
DCREQ0
SCREQ0
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
DLAST3
SLAST3
DLAST2
SLAST2
DLAST1
SLAST1
DLAST0
SLAST0