17 dmac channel x [x = 0 ] control b register – Rainbow Electronics AT91CAP9S250A User Manual
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6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
26.5.17
DMAC Channel x [x = 0..3] Control B Register
Name: DMAC_CTRLBx [x = 0..3]
Access: Read/Write
Reset Value: 0x00000000
• SIF
Source Interface Selection Field.
00: The source transfer is done via AHB-Lite Interface 0.
01: Reserved.
10: Reserved.
11: Reserved.
• DIF
Destination Interface Selection Field.
00: The destination transfer is done via AHB-Lite Interface 0.
01: Reserved.
10: Reserved.
11: Reserved.
• SRC_PIP
0: Picture-in-Picture mode is disabled. The source data area is contiguous.
1: Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is
automatically increment of a user defined amount.
• DST_PIP
0: Picture-in-Picture mode is disabled. The Destination data area is contiguous.
1: Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address
is automatically incremented by a user-defined amount.
• SRC_DSCR
0: Source address is updated when the descriptor is fetched from the memory.
1: Buffer Descriptor Fetch operation is disabled for the source.
31
30
29
28
27
26
25
24
AUTO
–
DST_INCR
–
–
SRC_INCR
23
22
21
20
19
18
17
16
FC
DST_DSCR
–
–
–
SRC_DSCR
15
14
13
12
11
10
9
8
–
–
DST_PIP
–
–
–
SRC_PIP
7
6
5
4
3
2
1
0
–
–
DIF
–
–
SIF