1 system controller block diagram – Rainbow Electronics AT91CAP9S250A User Manual

Page 28

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28

6264A–CAP–21-May-07

AT91CAP9S500A/AT91CAP9S250A

9.1

System Controller Block Diagram

Figure 9-1.

AT91CAP9S500A/AT91CAP9S250A System Controller Block Diagram

NRST

SLCK

Advanced

Interrupt

Controller

Real-Time

Timer

Periodic

Interval

Timer

Reset

Controller

PA0-PA31

periph_nreset

System Controller

Watchdog

Timer

wdt_fault
WDRPROC

PIO

Controllers

Power

Management

Controller

XIN

XOUT

PLLRCA

MAINCK

PLLACK

pit_irq

MCK

proc_nreset

wdt_irq

periph_irq[2]

periph_nreset

periph_clk[2..31]

PCK

MCK

pmc_irq

nirq
nfiq

rtt_irq

Embedded

Peripherals

periph_clk[2]

pck[0-3]

in
out
enable

ARM926EJ-S

SLCK

SLCK

irq0-irq1

fiq

irq0-irq1

fiq

periph_irq[7..27]

periph_irq[2..29]

int

int

periph_nreset

periph_clk[7..31]

jtag_nreset

por_ntrst

proc_nreset

periph_nreset

dbgu_txd

dbgu_rxd

pit_irq

rtt_irq

dbgu_irq

pmc_irq

rstc_irq

wdt_irq

rstc_irq

SLCK

Boundary Scan

TAP Controller

jtag_nreset

debug

PCK

debug

idle

debug

Bus Matrix

MCK

periph_nreset

proc_nreset

backup_nreset

periph_nreset

idle

Debug

Unit

dbgu_irq

MCK

dbgu_rxd

periph_nreset

dbgu_txd

rtt_alarm

Shut-Down

Controller

SLCK

rtt_alarm

backup_nreset

SHDN

WKUP

4 General-purpose

Backup Registers

backup_nreset

XIN32

XOUT32

PLLRCB

PLLBCK

PB0-PB31

PC0-PC31

VDDBU Powered

VDDCORE Powered

ntrst

VDDCORE

POR

MAIN

OSC

PLLA

VDDBU

POR

SLOW

CLOCK

OSC

PLLB

por_ntrst

Voltage

Controller

battery_save

PD0-PD31

UHPCK

USB Host

Port

UHPCK

periph_nreset

periph_clk[29]

periph_irq[29]

USB High-speed

Device Port

UDPHSCK

periph_nreset

periph_clk[28]

periph_irq[28]

UTMI PLL

UDPHSCK

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