2 transmitter operations – Rainbow Electronics AT91CAP9S250A User Manual
Page 585
585
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
36.6.1.4
Serial Clock Ratio Considerations
The Transmitter and the Receiver can be programmed to operate with the clock signals provided
on either the TK or RK pins. This allows the SSC to support many slave-mode data transfers. In
this case, the maximum clock speed allowed on the RK pin is:
– Master Clock divided by 2 if Receiver Frame Synchro is input
– Master Clock divided by 3 if Receiver Frame Synchro is output
In addition, the maximum clock speed allowed on the TK pin is:
– Master Clock divided by 6 if Transmit Frame Synchro is input
– Master Clock divided by 2 if Transmit Frame Synchro is output
36.6.2
Transmitter Operations
A transmitted frame is triggered by a start event and can be followed by synchronization data
before data transmission.
The start event is configured by setting the Transmit Clock Mode Register (SSC_TCMR).
The frame synchronization is configured setting the Transmit Frame Mode Register
(SSC_TFMR).
To transmit data, the transmitter uses a shift register clocked by the transmitter clock signal and
the start mode selected in the SSC_TCMR. Data is written by the application to the SSC_THR
register then transferred to the shift register according to the data format selected.
When both the SSC_THR and the transmit shift register are empty, the status flag TXEMPTY is
set in SSC_SR. When the Transmit Holding register is transferred in the Transmit shift register,
the status flag TXRDY is set in SSC_SR and additional data can be loaded in the holding
register.
Figure 36-8. Transmitter Block Diagram
Transmit Shift Register
Start
Selector
SSC_TSHR
SSC_THR
Transmitter Clock
TD
SSC_TFMR.FSLEN
SSC_TFMR.DATLEN
SSC_CR.TXEN
SSC_CR.TXDIS
SSC_TCMR.STTDLY
SSC_TFMR.FSDEN
SSC_TFMR.DATNB
SSC_SR.TXEN
SSC_TFMR.DATDEF
SSC_TFMR.MSBF
SSC_TCMR.STTDLY
SSC_TFMR.FSDEN
0
1
1
0
RF
TF