Rainbow Electronics AT91CAP9S250A - Manual (Page 984)

984
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
47.10.11 EMAC Timings
The Ethernet controller satisfies the timings of standard given in Table 47-45 and Table 47-46 , in
MAX and STH corners.
Timings are given assuming a capacitance load on data and clock:
47.10.11.1 MII Mode
Note: 1. VDDIO from 3.0V to 3.6V, maximum external capacitor = 20 pF
Table 47-44. Capacitance Load on Data, Clock Pads
Corner
Supply Max STH Min
3.3V 20pf 20pf 20pf
1.8V 20pf 20pf 205pf
Table 47-45. EMAC Signals Relative to EMDC
Symbol Parameter Min (ns) Max (ns)
EMAC
1
Setup for EMDIO from EMDC rising 10 ns
EMAC
2
Hold for EMDIO from EMDC rising 10 ns
EMAC
3
EMDIO toggling from EMDC rising 0 ns 300 ns
Table 47-46. EMAC MII Specific Signals
Symbol Parameter Min (ns) Max (ns)
EMAC
4
Setup for ECOL from ETXCK rising 10
EMAC
5
Hold for ECOL from ETXCK rising 10
EMAC
6
Setup for ECRS from ETXCK rising 10
EMAC
7
Hold for ECRS from ETXCK rising 10
EMAC
8
ETXER toggling from ETXCK rising 10 25
EMAC
9
ETXEN toggling from ETXCK rising 10 25
EMAC
10
ETX toggling from ETXCK rising 10 25
EMAC
11
Setup for ERX from ERXCK 10
EMAC
12
Hold for ERX from ERXCK 10
EMAC
13
Setup for ERXER from ERXCK 10
EMAC
14
Hold for ERXER from ERXCK 10
EMAC
15
Setup for ERXDV from ERXCK 10
EMAC
16
Hold for ERXDV from ERXCK 10