7 pwm interrupt mask register, 8 pwm interrupt status register – Rainbow Electronics AT91CAP9S250A User Manual
Page 753
753
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
40.6.7
PWM Interrupt Mask Register
Register Name:
PWM_IMR
Access Type:
Read-only
• CHIDx: Channel ID.
0 = Interrupt for PWM channel x is disabled.
1 = Interrupt for PWM channel x is enabled.
40.6.8
PWM Interrupt Status Register
Register Name:
PWM_ISR
Access Type:
Read-only
• CHIDx: Channel ID
0 = No new channel period has been achieved since the last read of the PWM_ISR register.
1 = At least one new channel period has been achieved since the last read of the PWM_ISR register.
Note: Reading PWM_ISR automatically clears CHIDx flags.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
CHID3
CHID2
CHID1
CHID0
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
CHID3
CHID2
CHID1
CHID0