Teledyne 6200E - Sulfides Analyzer - Manual (Page 219)

Model 6200E Instruction Manual Theory Of Operation
M6200E Rev: A1 219
The core of the analyzer is a microcomputer that controls various internal processes, interprets
data, makes calculations, and reports results using specialized firmware developed by Teledyne
Analytical Instruments. It communicates with the user as well as receives data from and issues
commands to a variety of peripheral devices through a separate printed circuit assembly to which
the CPU is mounted: the motherboard.
The motherboard is directly mounted to the rear panel and collects data, performs signal
conditioning duties and routs incoming and outgoing signals between the CPU and the analyzer’s
other major components.
Concentration data of the M6200E are generated by the photo multiplier tube (PMT), which
produces an analog current signal corresponding to the brightness of the fluorescence reaction in
the sample chamber. This current signal is amplified to a DC voltage signal (front panel test
parameter PMT) by a PMT preamplifier printed circuit assembly (located on top of the sensor
housing). PMT is converted to digital data by a bi-polar, analog-to-digital converter, located on
the motherboard.
In addition to the PMT signal, a variety of sensors report the physical and operational status of the
analyzer’s major components, again through the signal processing capabilities of the
motherboard. These status reports are used as data for the H
2
S concentration calculation (e.g.
pressure and temperature reading used by the temperature/pressure compensation feature) and
as trigger events for certain warning messages and control commands issued by the CPU. They
are stored in the CPU’s memory and, in most cases, can be viewed through the front panel
display.
The CPU communicates with the user and the outside world in a variety of ways:
• Through the analyzer’s keyboard and vacuum fluorescent display over a clocked, digital,
serial I/O bus using the I 2 C protocol (pronounced “I-squared-C”);
• RS 232 & RS485 serial I/O channels;
• Various analog voltage and current outputs and
• Several digital I/O channels.
Finally, the CPU issues commands (also over the I 2 C bus) to a series of relays and switches
located on a separate printed circuit assembly, the relay board (located in the rear of the chassis
on its own mounting bracket) to control the function of key electromechanical devices such as
heaters that keep the sample chamber at a steady temperature and, when installed, the
zero/span and internal zero/span valve sets and heaters.
10.4.1. CPU
The CPU is a low power (5 VDC, 0.8A max), high performance, 386-based microcomputer running
the DR-DOS operating system. Its operation and assembly conform to the PC-104 specification,
version 2.3 for embedded PC and PC/AT applications. It has 2 MB of DRAM memory on board and
operates at 40 MHz clock rate over an internal, 32-bit data and address bus. Chip to chip data
handling is performed by two 4-channel direct memory access (DMA) devices over data busses of
either 8-bit or 16-bit bandwidth. The CPU supports both RS-232 and RS-485 serial protocols.
Figure 10-11 shows the CPU.