Rockwell Automation 20L PowerFlex 700L Liquid-Cooled Adjustable Frequency AC Drive - Manual (Page 106)

5-6 Programming and Parameters
PowerFlex 700L Frames 2, 3A, and 3B Liquid-Cooled AC Drives User Manual
Publication 20L-UM001E-EN-P
333 700L FaultStatus
Indicates the occurrence of exception events that have been configured as fault conditions for the PowerFlex 700L Liquid-Cooled drive.
Bit 0 [Dsat Phs U1] indicates that the primary structure detected a Dsat on phase U.
Bit 1 [Dsat Phs V1] indicates that the primary structure detected a Dsat on phase V.
Bit 2 [Dsat Phs W1] indicates that the primary structure detected a Dsat on phase W.
Bit 3 [Ovr Current1] indicates that the primary structure detected an over current.
Bit 4 [Ovr Volt1] indicates that the primary structure detected an over voltage.
Bit 5 [Asym DcLink1] indicates that the primary structure detected an unbalanced DC Link.
Bit 6 [Pwr Suply1] indicates that the primary structure detected a power supply failure.
Bit 7 [HW Disable1] indicates that the primary structure detected a hardware disable.
Bit 8 [Latch Err1] indicates that the primary structure fault was generated but no indicating bit was set.
Bit 9 [Fan Fail1] indicates
Bit 12 [NonCnfgAlarm] indicates
Bit 13 [Cnv Faulted] indicates
Bit 14 [Cnv NotLogin] indicates that the converter expected but none logged in.
Bit 15 [Cnv NotStart] indicates that the converter commanded to start but did not become active.
Bit 16 [Dsat Phs U2] indicates that the second structure detected a Dsat on phase U.
Bit 17 [Dsat Phs V2] indicates that the second structure detected a Dsat on phase V.
Bit 18 [Dsat Phs W2] indicates that the second structure detected a Dsat on phase W.
Bit 19 [Ovr Current2] indicates that the second structure detected an over current.
Bit 20 [Ovr Volt2] indicates that the second structure detected an over voltage.
Bit 21 [Asym DcLink2] indicates that the second structure detected an unbalanced DC Link.
Bit 22 [Pwr Suply2] indicates that the second structure detected a power supply failure.
Bit 23 [HW Disable2] indicates that the second structure detected a hardware disable.
Bit 24 [Latch Err2] indicates that the second structure fault was generated but no indicating bit was set.
Bit 25 [Fan Fail2] indicates
Note: This parameter was added for firmware version 2.03.
No.
Name
Description
Values
Bit
Definition
Res
er
ve
d
Res
er
ve
d
Res
er
ve
d
Res
er
ve
d
Res
er
ve
d
Res
er
ve
d
Fan F
ail2
Lat
ch
Er
r2
HW Dis
ab
le2
Pwr S
uply2
Asy
m
D
cLink2
Ovr V
olt2
Ov
r Cu
rr
en
t2
Dsa
t Phs
W2
Dsa
t Phs
V2
Dsa
t Phs
U2
Cn
v No
tStar
t
Cn
v No
tL
ogin
Cn
v F
ault
ed
Non
Cnf
gAlar
m
Res
er
ve
d
Res
er
ve
d
Fan F
ail1
Lat
ch
Er
r1
HW Dis
ab
le1
Pwr S
uply1
Asy
m
D
cLink1
Ovr V
olt1
Ov
r Cu
rr
en
t1
Dsa
t Phs
W1
Dsa
t Phs
V1
Dsa
t Phs
U1
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 = False
1 = True