Toshiba H1 SERIES TLCS-900 - Manual (Page 132)

TMP92CM22
2007-02-16 92CM22-130
TMRB0 Flip-flop Control Register
7 6 5 4 3 2 1 0
Bit symbol − − TB0C1T1 TB0C0T1 TB0E1T1 TB0E0T1 TB0FFC1 TB0FFC0 TB0FFCR
(1183H)
Read/Write W R/W W*
After reset 1 1 0 0 0 0 1 1
TB0FF0 inversion trigger
0: Trigger disable
1: Trigger enable
Function Always write “11”.
Invert when
the UC10
value is
loaded into
TB0CP1H/L Invert when
the UC10
value is
loaded into
TB0CP0H/L Invert when
the UC10
matches
with
TB0RG1H/L Invert when
the UC10
match with
TB0RG0H/L
TB0FF0 control
00: Invert
01: Set
10: Clear
11: Don’t care
* Always read as “11”.
00 Invert
01 Set to “1”.
10 Set to “0”.
11 Don’t care.
0 Disable inversion
1 Enable inversion
0 Disable inversion
1 Enable inversion
0 Disable inversion
1 Enable inversion
0 Disable inversion
1 Enable inversion
Figure 3.8.6 Register for TMRB
Timer flip-flop TB0 (TB0FF0) control
Inverted when the UC10 value matches the value in
TB0RG0H/L
Inverted when the UC10 value matches the value in
TB0RG1H/L
Inverted when the UC10 value is loaded into
TB0CP0H/L
Inverted when the UC10 value is loaded into
TB0CP1H/L
Read-modify
-write
instruction is
prohibited