Toshiba H1 SERIES TLCS-900 - Manual (Page 88)

TMP92CM22
2007-02-16 92CM22-86
(5) Bus access timing
• External read/write bus cycle (0 waits)
• External read/write bus cycle (1 wait)
CS
WR
RD
Address
input
output
Read
Write
CLKOUT
(20 MHz)
D7 to D0
D7 to D0
T1 T2
CS
WR
RD
Address
Outpu t
CLKOUT
(20 MHz)
D7 to D0
D7 to D0
T1 TW
Inpu t
Read
Write
T2