Toshiba H1 SERIES TLCS-900 User Manual
Page 245
TMP92CM22
2007-02-16
92CM22-243
16-bit timer (2/2)
Symbol
Name
Address
7 6 5 4 3 2 1 0
TB1RDE
−
I2TB0
TB1PRUN
TB1RUN
R/W
R/W
R/W
0 0 0 0 0
TMRB1
prescaler
UP
counter
(UC12)
TB1RUN
Timer B1
RUN
register
1190H
Double
buffer
0: Disable
1: Enable
Always
write “0”.
IDLE2
0: Stop
1: Operate
0: Stop and clear
1: Run (Count up)
TB1CT1 TB1ET1
TB1CP0I
TB1CPM1
TB1CPM0
TB1CLE TB1CLK1
TB1CLK0
R/W W
R/W
0 0 1 0 0 0 0 0
TB1FF1 inversion
trigger
0: Disable trigger
1: Enable trigger
TB1MOD
Timer B1
mode
register
1192H
(Prohibit
RMW)
Invert when
UC12 is
loaded into
TB1CP1H/L
Invert when
UC12
matches
with
TB1RG1H/L
Software
capture
control
0: Software
capture
1: Undefined
Capture timing
00: Disable
01: TB1N0
↑ TB1IN1 ↑
10:TB1IN0
↑ TB1IN0 ↓
11: TA1OUT↑
TA1OUT↓
Up counter
control
0: Clear
disable
1: Clear
enable
Timer B1 source clock
00: TB1IN0 pin input
01:
φT1
10:
φT4
11:
φT16
TB1FF1C1 TB1FF1C0
TB1C1T1
TB1C0T1
TB1E1T1
TB1E0T1 TB1FFC1 TB1FFC0
W* R/W W*
1 1 0 0 0 0 1 1
TB0FF0 inversion trigger
0: Disable trigger
1: Enable trigger
TB1FFCR
Timer B1
flip-flop
control
register
1193H
(Prohibit
RMW)
Control TB1FF1
00: Invert
01: Set
10: Clear
11: Don’t care
*Always read as 11.
Invert when
the UC12
value is
loaded in to
TB1CP1H/L.
Invert when
the UC12
value is
loaded in to
TB1CP0H/L.
Invert when
the UC12
value
matches the
value in
TB1RG1H/L.
Invert when
the UC12
value
matches the
value in
TB1RG0H/L.
Control TB1FF0
00: Invert
01: Set
10: Clear
11: Don’t care
*Always read as 11.
⎯
W
TB1RG0L
16-bit timer
register 0
low
1198H
(Prohibit
RMW)
Undefined
⎯
W
TB1RG0H
16-bit timer
register 0
high
1199H
(Prohibit
RMW)
Undefined
⎯
W
TB1RG1L
16-bit timer
register 1
low
119AH
(Prohibit
RMW)
Undefined
⎯
W
TB1RG1H
16-bit timer
register 1
high
119BH
(Prohibit
RMW)
Undefined
⎯
R
TB1CP0L
Capture
register 0
low
119CH
Undefined
⎯
R
TB1CP0H
Capture
register 0
high
119DH
Undefined
⎯
R
TB1CP1L
Capture
register 1
low
119EH
Undefined
⎯
R
TB1CP1H
Capture
register 1
high
119FH
Undefined