Toshiba H1 SERIES TLCS-900 - Manual (Page 238)

TMP92CM22
2007-02-16 92CM22-236
Interrupt control (2/2)
Symbol Name Address 7 6 5 4 3 2 1 0
− INTP0
− − − − IP0C
IP0M2 IP0M1 IP0M0
− − − − R
R/W
0 0 0 0 0 0 0 0
INTEP0
INTP0
enable
00EEH
Always write “0”. 1: INTP0 Interrupt request level
INTAD INT0
IADC IADM2 IADM1 IADM0 I0C I0M2 I0M1 I0M0
R R/W R R/W
0 0 0 0 0 0 0 0
INTE0AD
INT0 &
INTAD
enable 00F0H
1: INTAD Interrupt request level 1: INT0 Interrupt request level
INTTC1 (DMA1) INTTC0 (DMA0)
ITC1C ITC1M2 ITC1M1 ITC1M0 ITC0C ITC0M2 ITC0M1 ITC0M0
R R/W R R/W
0 0 0 0 0 0 0 0
INTETC01
INTTC0 &
INTTC1
enable
00F1H
1: INTTC1 Interrupt request level 1: INTTC0 Interrupt request level
INTTC3 (DMA3) INTTC2 (DMA2)
ITC3C ITC3M2 ITC3M1 ITC3M0 ITC2C ITC2M2 ITC2M1 ITC2M0
R R/W R R/W
0 0 0 0 0 0 0 0
INTETC23
INTTC2 &
INTTC3
enable
00F2H
1: INTTC3 Interrupt request level 1: INTTC2 Interrupt request level
INTTC5 (DMA5) INTTC4 (DMA4)
ITC5C ITC5M2 ITC5M1 ITC5M0 ITC4C ITC4M2 ITC4M1 ITC4M0
R R/W R R/W
0 0 0 0 0 0 0 0
INTETC45
INTTC4 &
INTTC5
enable
00F3H
1: INTTC5 Interrupt request level 1: INTTC4 Interrupt request level
INTTC7 (DMA7) INTTC6 (DMA6)
ITC7C ITC7M2 ITC7M1 ITC7M0 ITC6C ITC6M2 ITC6M1 ITC6M0
R R/W R R/W
0 0 0 0 0 0 0 0
INTETC67
INTTC6 &
INTTC7
enable
00F4H
1: INTTC7 Interrupt request level 1: INTTC6 Interrupt request level
IR1LE IR0LE
W
1 1
SIMC
SIO
interrupt
mode
control
00F5H
(Prohibit
RMW)
0: INTRX1
edge
mode
1: INTRX1
level
mode
0: INTRX0
edge
mode
1: INTRX0
level
mode
I3EDGE I2EDGE I1EDGE I0EDGE I0LE NMIREE
W
0 0 0 0 0 0
IIMC
Interrupt
input
mode
control
00F6H
(Prohibit
RMW)
INT3
0: Rising/
high
1: Falling/
low
INT2
0: Rising/
high
1: Falling/
low
INT1
0: Rising/
high
1: Falling/
low
INT0
0: Rising/
high
1: Falling/
low
INT0
0: Edge
mode
1: Level
mode
NMI
0: Falling
1: Falling
and
rising
− − − − INTWD − − −
− − − − R − − −
− − − − 0 − − −
INTWDT
INTWD
enable
00F7H
Always write “0”. 1: INTWD
CLRV5 CLRV4 CLRV3 CLRV2 CLRV1 CLRV0
W
0 0 0 0 0 0
INTCLR
Interrupt
clear
control
00F8H
(Prohibit
RMW)
Interrupt vector
I3LE I2LE I1LE
W
0 0 0
IIMC2
Interrupt
input
mode
control
00FAH
(Prohibit
RMW)
INT3
0: Edge
1: Level
INT2
0: Edge
1: Level
INT1
0: Edge
1: Level