Toshiba H1 SERIES TLCS-900 User Manual
Page 188
TMP92CM22
2007-02-16
92CM22-186
When the <TRX> is “0” (Receiver mode)
When the next transmitted data is other than 8 bits, set <BC2:0> <ACK> and
read the received data from SBI0DBR to release the SCL line (Data which is read
immediately after a slave address is sent is undefined). After the data is read,
<PIN> becomes “1”. Serial clock pulse for transferring new 1 word of data is
defined SCL and outputs “L” level from SDA pin with acknowledge timing.
An INTSBE interrupt request then generates and the <PIN> becomes “0”, Then
the TMP92CM22 pulls down the SCL pin to the low level. The TMP92CM22
outputs a clock pulse for 1 word of data transfer and the acknowledge signal each
time that received data is read from the SBI0DBR.
Figure 3.10.15 Example of when <BC2:0>
= “000”, <ACK> = “1” (Receiver mode)
In order to terminate the transmission of data to a transmitter, clear <ACK> to
“0” before reading data which is 1 word before the last data to be received. The last
data word does not generate a clock pulse as the acknowledge signal. After the
data has been transmitted and an interrupt request has been generated, set
<BC2:0> to “001” and read the data. The TMP92CM22 generates a clock pulse for
a 1-bit data transfer. Since the master device is a receiver, the SDA line on the bus
remains high. The transmitter receives the high signal as an ACK signal. The
receiver indicates to the transmitter that the data transfer is completed.
After the one data bit has been received and an interrupt request has been
generated, the TMP92CM22 generates a stop condition (See section 3.10.6 (4)) and
terminates data transfer.
Figure 3.10.16 Termination of Data Transfer (Master receiver mode)
1
2
3
4
5
6
7
8
9
D7
D6 D5
D4
D3
D2
D1
D0
Acknowledge signal to
a transmitter
Read receiving data
SCL line
SDA line
<PIN>
INTSBE0
interrupt
request
New D7
Output of master
Output of slave
ACK
1
2
3
4
5
6
7
8
1
D7
D6 D5
D4
D3
D2
D1
D0
Acknowledge signal
“H” to transmitter
SCL
SDA
<PIN>
INTSBE0
interrupt
request
After set “001” to
<BC2:0>, reading
receiving data.
After clear <ACK> to “0”, reading receiving data.
9
Output of master
Output of slave