Compare output mode and waveform generation, Modes of operation, Ure 49 show – Rainbow Electronics ATmega128L User Manual

Page 117: Atmega128(l)

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117

ATmega128(L)

2467B–09/01

internal OCnx register, not the OCnx pin. If a system reset occur, the OCnx register is
reset to “0”.

Figure 49. Compare Match Output Unit, Schematic

The general I/O port function is overridden by the output compare (OCnx) from the
waveform generator if either of the COMnx1:0 bits are set. However, the OCnx pin
direction (input or output) is still controlled by the data direction register (DDR) for the
port pin. The data direction register bit for the OCnx pin (DDR_OCnx) must be set as
output before the OCnx value is visible on the pin. The port override function is generally
independent of the waveform generation mode, but there are some exceptions. Refer to
Table 58, Table 59 and Table 60 for details.

The design of the output compare pin logic allows initialization of the OCnx state before
the output is enabled. Note that some COMnx1:0 bit settings are reserved for certain
modes of operation.

See “16-bit Timer/Counter Register Description” on page 127.

The COMnx1:0 bits have no effect on the input capture unit.

Compare Output Mode and
Waveform Generation

The waveform generator uses the COMnx1:0 bits differently in normal, CTC, and PWM
modes. For all modes, setting the COMnx1:0 = 0 tells the waveform generator that no
action on the OCnx register is to be performed on the next compare match. For compare
output actions in the non-PWM modes refer to

Table 58 on page 128. For fast PWM

mode refer to

Table 59 on page 128, and for phase correct and phase and frequency

correct PWM refer to

Table 60 on page 129.

A change of the COMnx1:0 bits state will have effect at the first compare match after the
bits are written. For non-PWM modes, the action can be forced to have immediate effect
by using the FOCnx strobe bits.

Modes of Operation

The mode of operation, i.e. the behavior of the Timer/Counter and the output compare
pins, is defined by the combination of the waveform generation mode (WGMn3:0) and
compare output mode (COMnx1:0) bits. The compare output mode bits do not affect the
counting sequence, while the waveform generation mode bits do. The COMnx1:0 bits
control whether the PWM output generated should be inverted or not (inverted or non-

PORT

DDR

D

Q

D

Q

OCnx

Pin

OCnx

D

Q

Waveform

Generator

COMnx1

COMnx0

0

1

DATABUS

FOCnx

clk

I/O

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