Rainbow Electronics ATmega128L - Manual (Page 128)

128
ATmega128(L)
2467B–09/01
Table 59 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the
fast PWM mode
Note: A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1/COMnC1 is set. In this case the compare match is ignored, but the
set or clear is done at TOP.
See “Fast PWM Mode” on page 119. for more details.
Table 59 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the
phase correct and frequency correct PWM mode.
Table 58. Compare Output Mode, Non-PWM
COMnA1/COMnB1/
COMnC1
COMnA0/COMnB0/
COMnC0 Description
0 0 Normal port operation, OCnA/OCnB/OCnC
disconnected.
0 1 Toggle OCnA/OCnB/OCnC on compare
match
1 0 Clear OCnA/OCnB/OCnC on compare
match (Set output to low level)
1 1 Set OCnA/OCnB/OCnC on compare match
(Set output to high level)
Table 59. Compare Output Mode, Fast PWM
COMnA1/COMnB1/
COMnC0
COMnA0/COMnB0/
COMnC0 Description
0 0 Normal port operation, OCnA/OCnB/OCnC
disconnected.
0 1 WGMn3=0: Normal port operation,
OCnA/OCnB/OCnC disconnected.
WGMn3=1: Toggle OCnA on compare
match, OCnB/OCnC reserved.
1 0 Clear OCnA/OCnB/OCnC on compare
match, set OCnA/OCnB/OCnC at TOP
1 1 Set OCnA/OCnB/OCnC on compare match,
clear OCnA/OCnB/OCnC at TOP