Rainbow Electronics ATmega128L - Manual (Page 182)

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ATmega128(L)
2467B–09/01
frames. When the frame type bit (the first stop or the 9th bit) is one, the frame contains
an address. When the frame type bit is zero the frame is a data frame.
The Multi-processor Communication Mode enables several slave MCUs to receive data
from a master MCU. This is done by first decoding an address frame to find out which
MCU has been addressed. If a particular slave MCU has been addressed, it will receive
the following data frames as normal, while the other slave MCUs will ignore the received
frames until another address frame is received.
Using MPCM For an MCU to act as a master MCU, it can use a 9-bit character frame format (UCSZ =
7). The 9th bit (TXB8) must be set when an address frame (TXB8 = 1) or cleared when
a data frame (TXB = 0) is being transmitted. The slave MCUs must in this case be set to
use a 9 bit character frame format.
The following procedure should be used to exchange data in Multi-processor Communi-
cation Mode:
1. All slave MCUs are in Multi-processor Communication Mode (MPCM in UCSRA
is set).
2. The master MCU sends an address frame, and all slaves receive and read this
frame. In the slave MCUs, the RXC flag in UCSRA will be set as normal.
3. Each slave MCU reads the UDR register and determines if it has been selected.
If so, it clears the MPCM bit in UCSRA, otherwise it waits for the next address
byte and keeps the MPCM setting.
4. The addressed MCU will receive all data frames until a new address frame is
received. The other slave MCUs, which still have the MPCM bit set, will ignore
the data frames.
5. When the last data frame is received by the addressed MCU, the addressed
MCU sets the MPCM bit and waits for a new address frame from master. The
process then repeats from 2.
Using any of the 5- to 8-bit character frame formats is possible, but impractical since the
receiver must change between using n and n+1 character frame formats. This makes
full-duplex operation difficult since the transmitter and receiver uses the same character
size setting. If 5- to 8-bit character frames are used, the transmitter must be set to use
two stop bit (USBS = 1) since the first stop bit is used for indicating the frame type.
Do not use read-modify-write instructions (SBI and CBI) to set or clear the MPCM bit.
The MPCM bit shares the same I/O location as the TXC flag and this might accidentally
be cleared when using SBI or CBI instructions.
USART Register
Description
USART I/O Data Register –
UDR
The USART Transmit Data Buffer register and USART Receive Data Buffer registers
share the same I/O address referred to as USART Data Register or UDR. The transmit
data buffer register (TXB) will be the destination for data written to the UDR register
Bit 7 6 5 4 3 2 1 0
RXB[7:0] UDR (Read)
TXB[7:0] UDR (Write)
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0