Rainbow Electronics ATmega128L - Manual (Page 44)

44
ATmega128(L)
2467B–09/01
Minimizing Power
Consumption There are several issues to consider when trying to minimize the power consumption in
an AVR controlled system. In general, sleep modes should be used as much as possi-
ble, and the sleep mode should be selected so that as few as possible of the device’s
functions are operating. All functions not needed should be disabled. In particular, the
following modules may need special consideration when trying to achieve the lowest
possible power consumption.
Analog to Digital Converter If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should
be disabled before entering any sleep mode. When the ADC is turned off and on again,
the next conversion will be an extended conversion. Refer to
“Analog to Digital Con-
verter” on page 221 for details on ADC operation.
Analog Comparator When entering Idle Mode, the Analog Comparator should be disabled if not used. When
entering ADC Noise Reduction Mode, the Analog Comparator should be disabled. In the
other sleep modes, the Analog Comparator is automatically disabled. However, if the
Analog Comparator is set up to use the Internal Voltage Reference as input, the Analog
Comparator should be disabled in all sleep modes. Otherwise, the Internal Voltage Ref-
erence will be enabled, independent of sleep mode. Refer to
“Analog Comparator” on
page 218 for details on how to configure the Analog Comparator.
Brown-out Detector If the Brown-out Detector is not needed in the application, this module should be turned
off. If the Brown-out Detector is enabled by the BODEN fuse, it will be enabled in all
sleep modes, and hence, always consume power. In the deeper sleep modes, this will
contribute significantly to the total current consumption. Refer to
“Brown-out Detector”
on page 44 for details on how to configure the Brown-out Detector.
Internal Voltage Reference The Internal Voltage Reference will be enabled when needed by the Brown-out detec-
tor, the Analog Comparator or the ADC. If these modules are disabled as described in
the sections above, the internal voltage reference will be disabled and it will not be con-
suming power. When turned on again, the user must allow the reference to start up
before the output is used. If the reference is kept on in sleep mode, the output can be
used immediately. Refer to
“Internal Voltage Reference” on page 49 for details on the
start-up time.
Watchdog Timer If the Watchdog Timer is not needed in the application, this module should be turned off.
If the Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence,
always consume power. In the deeper sleep modes, this will contribute significantly to
the total current consumption. Refer to
“Watchdog Timer” on page 50 for details on how
to configure the Watchdog Timer.
Port Pins When entering a sleep mode, all port pins should be configured to use minimum power.
The most important thing is then to ensure that no pins drive resistive loads. In sleep
modes where the both the I/O clock (clk
I/O
) and the ADC clock (clk
ADC
) are stopped, the
input buffers of the device will be disabled. This ensures that no power is consumed by
the input logic when not needed. In some cases, the input logic is needed for detecting
wake-up conditions, and it will then be enabled. Refer to the section
“Digital Input
Enable and Sleep Modes” on page 65 for details on which pins are enabled. If the input
buffer is enabled and the input signal is left floating or have an analog signal level close
to V
CC
/2, the input buffer will use excessive power.