Rainbow Electronics ATmega128L - Manual (Page 143)

143
ATmega128(L)
2467B–09/01
Figure 62. Output Compare Unit, Block Diagram
The OCR2 register is double buffered when using any of the pulse width modulation
(PWM) modes. For the normal and clear timer on compare (CTC) modes of operation,
the double buffering is disabled. The double buffering synchronizes the update of the
OCR2 compare register to either top or bottom of the counting sequence. The synchro-
nization prevents the occurrence of odd-length, non-symmetrical PWM pulses, thereby
making the output glitch-free.
The OCR2 register access may seem complex, but this is not case. When the double
buffering is enabled, the CPU has access to the OCR2 buffer register, and if double
buffering is disabled the CPU will access the OCR2 directly.
Force Output Compare In non-PWM waveform generation modes, the match output of the comparator can be
forced by writing a one to the force output compare (FOC2) bit. Forcing compare match
will not set the OCF2 flag or reload/clear the timer, but the OC2 pin will be updated as if
a real compare match had occurred (the COM21:0 bits settings define whether the OC2
pin is set, cleared or toggled).
Compare Match Blocking by
TCNT2 Write All CPU write operations to the TCNT2 register will block any compare match that occur
in the next timer clock cycle, even when the timer is stopped. This feature allows OCR2
to be initialized to the same value as TCNT2 without triggering an interrupt when the
Timer/Counter clock is enabled.
Using the Output Compare
Unit Since writing TCNT2 in any mode of operation will block all compare matches for one
timer clock cycle, there are risks involved when changing TCNT2 when using the output
compare channel, independently of whether the Timer/Counter is running or not. If the
value written to TCNT2 equals the OCR2 value, the compare match will be missed,
resulting in incorrect waveform generation. Similarly, do not write the TCNT2 value
equal to BOTTOM when the counter is downcounting.
The setup of the OC2 should be performed before setting the data direction register for
the port pin to output. The easiest way of setting the OC2 value is to use the force output
OCFn (Int.Req.)
=
(8-bit Comparator )
OCRn
OCn
DATA BUS
TCNTn
WGMn1:0
Waveform Generator
top
FOCn
COMn1:0
bottom