Scanning the reset pin, Scanning the clock pins, Atmega128(l) – Rainbow Electronics ATmega128L User Manual

Page 250

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250

ATmega128(L)

2467B–09/01

Figure 125. Additional Scan Signal for the Two-wire Interface

Scanning the RESET Pin

The RESET pin accepts 5V active low logic for standard reset operation, and 12V active
high logic for High Voltage Parallel programming. An observe-only cell as shown in

Fig-

ure 126 is inserted both for the 5V reset signal; RSTT, and the 12V reset signal;
RSTHV.

Figure 126. Observe-only Cell

Scanning the Clock Pins

The AVR devices have many clock options selectable by fuses. These are: Internal RC
Oscillator, External RC, External Clock, (High Frequency) Crystal Oscillator, Low Fre-
quency Crystal Oscillator, and Ceramic Resonator.

Figure 127 shows how each oscillator with external connection is supported in the scan
chain. The Enable signal is supported with a general boundary-scan cell, while the oscil-
lator/clock output is attached to an observe-only cell. In addition to the main clock, the
timer oscillator is scanned in the same way. The output from the internal RC-Oscillator is
not scanned, as this oscillator does not have external connections.

Pxn

PUExn

ODxn

IDxn

TWIEN

OCxn

Slew-rate limited

SRC

0

1

D

Q

From

previous

cell

ClockDR

ShiftDR

To

next

cell

From system pin

To system logic

FF1

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