Rainbow Electronics ATmega128L - Manual (Page 180)

180
ATmega128(L)
2467B–09/01
Figure 84. Stop Bit Sampling and Next Start Bit Sampling
The same majority voting is done to the stop bit as done for the other bits in the frame. If
the stop bit is registered to have a logic 0 value, the frame error (FE) flag will be set.
A new high to low transition indicating the start bit of a new frame can come right after
the last of the bits used for majority voting. For normal speed mode, the first low level
sample can be at point marked (A) in
Figure 84. For double speed mode the first low
level must be delayed to (B). (C) marks a stop bit of full length. The early start bit detec-
tion influences the operational range of the receiver.
Asynchronous Operational
Range The operational range of the receiver is dependent on the mismatch between the
received bit rate and the internally generated baud rate. If the transmitter is sending
frames at too fast or too slow bit rates, or the internally generated baud rate of the
receiver does not have a similar (see
Table 75) base frequency, the receiver will not be
able to synchronize the frames to the start bit.
The following equations can be used to calculate the ratio of the incoming data rate and
internal receiver baud rate.
D Sum of character size and parity size (D = 5 to 10-bit)
S Samples per bit. S = 16 for normal speed mode and S = 8 for double speed mode.
S
F
First sample number used for majority voting. S
F
= 8 for normal speed and S
F
= 4
for double speed mode.
S
M
Middle sample number used for majority voting. S
M
= 9 for normal speed and S
M
=
5 for double speed mode.
R
slow
is the ratio of the slowest incoming data rate that can be accepted in relation to the
receiver baud rate. R
fast
is the ratio of the fastest incoming data rate that can be
accepted in relation to the receiver baud rate.
Table 75 and Table 76 list the maximum receiver baud rate error that can be tolerated.
Note that normal speed mode has higher toleration of baud rate variations.
1 2 3 4 5 6 7 8 9 10 0/1 0/1 0/1
STOP 1
1 2 3 4 5 6 0/1
RxD
Sample
(U2X = 0)
Sample
(U2X = 1)
(A) (B) (C)
R
slo w
D 1 +
( )S
S 1 – D S
⋅
S
F
+ +
------------------------------------------- = R
fast
D
2
+
( )S
D
1
+
( )S S
M
+
----------------------------------- =