Altera Arria V Avalon-MM - Manual (Page 11)

Link Rate Link Width Interface
Width
Application Clock
Frequency (MHz)
Recommended Speed Grades
Gen2
×1 64 bits
125
–4,–5
×2 64 bits 125 –4,–5
×4 128 bits 125 –4,–5
Related Information
• Area and Timing Optimization
• Altera Software Installation and Licensing Manual
• Setting up and Running Analysis and Synthesis
Steps in Creating a Design for PCI Express
Before you begin
Select the PCIe variant that best meets your design requirements.
• Is your design an Endpoint or Root Port?
• What Generation do you intend to implement?
• What link width do you intend to implement?
• What bandwidth does your application require?
• Does your design require CvP?
1. Select parameters for that variant.
2. Simulate using an Altera-provided example design. All of Altera's PCI Express example designs are
available under
<install_dir>/ip/altera/altera_pcie/
. Alternatively, create a simulation model and use your
own custom or third-party BFM. The Qsys Generate menu generates simulation models. Altera
supports ModelSim-Altera for all IP. The PCIe cores support the Aldec RivieraPro, Cadence NCsim,
Mentor Graphics ModelSim, and Synopsys VCS and VCS-MX simulators.
3. Compile your design using the Quartus II software. If the versions of your design and the Quartus II
software you are running do not match, regenerate your PCIe design.
4. Download your design to an Altera development board or your own PCB. Click on the All Develop‐
ment Kits link below for a list of Altera's development boards.
5. Test the hardware. You can use Altera's SignalTap ® II Logic Analyzer or a third-party protocol
analyzer to observe behavior.
6. Substitute your Application Layer logic for the Application Layer logic in Altera's testbench. Then
repeat Steps 3–6. In Altera's testbenches, the PCIe core is typically called the DUT (device under test).
The Application Layer logic is typically called APPS.
Related Information
• Parameter Settings on page 3-1
• Getting Started with the Avalon-MM Arria V Hard IP for PCI Express
• All Development Kits
1-10 Steps in Creating a Design for PCI Express
UG-01105_avmm
2014.12.15
Altera Corporation Datasheet
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