Nortel Networks DCT1900 - Manual (Page 356)

Technical Product Manual - DCT1900
Maintenance, Test and Maintenance Software
2-6 Maint-DCT1900/R8/mw
© 2000-2005
2.3 Testing
The T&M module has three tests available to check the overall system performance and to report
any deviations in performance. These tests are:
z Board power–on test
z Ack test
z 24h test
2.3.1 Board Power–on Test
A board power–on test is an individual test performed on a board after power is applied to that
board. The test is initiated not only after insertion of the board in an operational system, but also
after a system power–on. When powering on the system, a board power–on test is executed
simultaneously on all boards.
The board power–on test has the following phases:
z Board test
z Board announcement
z Test result messaging
z Watch–dog test
Board Test
As soon as power is applied to the system or when a single board is inserted into a system under
power, a self test is initiated on each board or on the single added board. This self test is under
control of the board controller. During this board test, the board controllers and peripherals, if
present, go through different states. The board test consists of:
ROM/RAM test
: All processors on the board start up a ROM/RAM test. The ROM’s
check sum is verified and a read/write test is performed in RAM.
Communication test : All board controllers test if they can communicate with the peripheral
circuits on the board.
Internal loop back test : A "speech–signal" is generated at one end of the board on a speech
path and routed to the other end where a loop back is created, thus re–
routing the signal to its originating point for verification. Thus, continuity
tests are performed for all speech paths on the board.
On the CLU and the CLU part of the SLU, the speech test is looped
back by the Base Station thus testing the wiring to the Base Stations as
well.
State test : The various states that a board can be in are tested.
DTU link test : For each DTC the primary rate communication link is checked.
Board Announcement
After completion of the board test, the board controller will set a message ready for the CPU. By
means of this message the board will identify itself to the CPU. A polling processor on the CPU
board will collect the message from the board controller of the board. By this board announcement
the CPU knows the exact position of each board in the system. After the board announcement,
the board controllers and peripherals will have the status: NEW.
Test Result Messaging
After the board announcement, the CPU requests the board to send the result of the board test.
Upon the type of message received, T&M may decide to re–test a board and to make an error
report. When the test results are positive, the board controllers and peripherals will be given a new