Texas Instruments TMS320C64x DSP - Manual (Page 138)

Video Capture Registers
Video Capture Port 3-76 SPRU629
3.13.14 TSI System Time Clock LSB Register (TSISTCLKL)
The transport stream interface system time clock LSB register (TSISTCLKL)
contains the 32 least-significant bits (LSBs) of the program clock reference
(PCR). The system time clock value is obtained by reading TSISTCLKL and
TSISTCLKM. TSISTCLKL is shown in Figure 3–42 and described in
Table 3–27.
TSISTCLKL represents the current value of the 32 LSBs of the base PCR that
normally counts at a 90-kHz rate. Since the system time clock counter contin-
ues to count, the DSP may need to read TSISTCLKL twice in a row to ensure
an accurate value.
Figure 3–42. TSI System Time Clock LSB Register (TSISTCLKL)
31 0
PCR
R/W-0
Legend: R/W = Read/Write; -n = value after reset
Table 3–27. TSI System Time Clock LSB Register (TSISTCLKL) Field Descriptions
Description
Bit Field symval † Value
BT.656, Y/C Mode,
or Raw Data Mode
TSI Mode
31–0 PCR OF(value) 0–FFFF FFFFh Not used. Contains the 32 LSBs of the
program clock reference.
† For CSL implementation, use the notation VP_TSISTCLKL_PCR_symval