Table 2-2, Table 2-3, Receiver interface – Xilinx LOGICORE UG144 User Manual

Page 27: Flow control interface

Advertising
background image

1-Gigabit Ethernet MAC v8.5 User Guide

www.xilinx.com

27

UG144 April 24, 2009

Core Interfaces

R

-- DISCONTINUED PRODUCT --

Receiver Interface

Table 2-2

describes the client-side receiver signals of the GEMAC core. These signals are

used by to transfer data to the client. See

“Receiving Inbound Frames,” on page 39

.

Flow Control Interface

Table 2-3

describes the signals used by the client to request a flow control action from the

transmit engine. See

“Using Flow Control,” on page 53

.

Table 2-2:

Receive Client Interface Signal Pins

Signal

Direction

Clock Domain

Description

rx_data[7:0]

Output

gmii_rx_clk

Frame data received is
supplied on this port.

rx_data_valid

Output

gmii_rx_clk

Control signal for the rx_data
port.

rx_good_frame

Output

gmii_rx_clk

Asserted at end of frame
reception to indicate that the
frame should be processed by
the MAC client.

rx_bad_frame

Output

gmii_rx_clk

Asserted at end of frame
reception to indicate that the
frame should be discarded by
the MAC client.

rx_statistics_vector[27:0]

Output

gmii_rx_clk

Provides statistical
information about the last
frame received.

rx_statistics_valid

Output

gmii_rx_clk

Asserted at end of frame
reception, indicating that the
rx_statistics_vector is valid.

Table 2-3:

Flow Control Interface Signal Pinout

Signal

Direction

Clock Domain

Description

pause_req

Input

gtx_clk

Pause request. sends a pause
frame down the link.

pause_val[15:0]

Input

gtx_clk

Pause value; inserted into the
parameter field of the
transmitted pause frame.

Advertising