Xilinx Virtex-5 FPGA ML561 - Manual (Page 107)

Virtex-5 FPGA ML561 User Guide www.xilinx.com 107
UG199 (v1.2.1) June 15, 2009
FPGA #2 Pinout R
FPGA #2 External Interfaces (cont.)
FPGA2_TXN0_BK120 B3 FPGA2_USB_CTS_N L15
FPGA2_TXN1_BK120 D2 FPGA2_USB_DSR_N K16
FPGA2_TXP0_BK120 B4 FPGA2_USB_DTR_N J15
FPGA2_TXP1_BK120 E2 FPGA2_USB_RST_N L21
FPGA2_RS232_CTS K14 FPGA2_USB_RTS_N L16
FPGA2_RS232_RTS L14 FPGA2_USB_RX J22
FPGA2_RS232_RX G22 FPGA2_USB_SUSPEND L20
FPGA2_RS232_TX H22 FPGA2_USB_TX K21
Table A-2: FPGA #2 Pinout (Continued)
Signal Name Pin Signal Name Pin