Xilinx Virtex-5 FPGA ML561 - Manual (Page 75)

Virtex-5 FPGA ML561 User Guide www.xilinx.com 75
UG199 (v1.2.1) June 15, 2009
Signal Integrity Correlation Results R
Figure 7-28: DDR2 DIMM Write Extrapolation - Eye Scope Shot at Receiver IOB (Fast Corner)
400.0 800.0 1200.0 1600.0 2000.0 2400.0
-200.0
0.000
200.0
400.0
600.0
800.0
1000.0
1200.0
1400.0
1600.0
1800.0
UG199_c7_28_071007
Time (ps)
Voltage (mV)
Probe 6:U3_B01.J1 (at die)
♦
333 MHz, Fast, PRBS6, 88% UI
♦
Cursor 1: 1.1004V, 646.3 ps
♦
Cursor 2: 1.0273V, 1.9659 ns
♦
Delta Voltage = 73.1 mV, Delta Time = 1.3196 ns (88% UI)
Figure 7-29: DDR2 DIMM Write Extrapolation - Waveform Scope Shot at Receiver IOB (Fast Corner)
95.000 105.000 115.000 125.000 135.000 145.000
0.000
200.0
400.0
600.0
800.0
1000.0
1200.0
1400.0
1600.0
1800.0
UG199_c7_29_071007
Time (ns)
Voltage (mV)
Probe 6:U3_B01.J1 (at die)