Xilinx Virtex-5 FPGA ML561 - Manual (Page 74)

74 www.xilinx.com Virtex-5 FPGA ML561 User Guide
UG199 (v1.2.1) June 15, 2009
Chapter 7: ML561 Hardware-Simulation Correlation R
Figure 7-26: DDR2 DIMM Write Extrapolation - Eye Scope Shot at Receiver IOB (Slow Corner)
1000.0 1400.0 1800.0 2200.0 2600.0
-200.0
0.000
200.0
400.0
600.0
800.0
1000.0
1200.0
1400.0
1600.0
1800.0
UG199_c7_26_071007
Time (ps)
Voltage (mV)
Probe 6:U3_B01.J1 (at die)
♦
333 MHz, Slow, PRBS6, 82% UI
♦
Cursor 1: 1.1028V, 1.2399 ns
♦
Cursor 2: 1.0253V, 2.4671 ns
♦
Delta Voltage = 77.5 mV, Delta Time = 1.2272 ns (82% UI)
Figure 7-27: DDR2 DIMM Write Extrapolation - Waveform Scope Shot at Receiver IOB (Slow Corner)
95.000 105.000 115.000 125.000 135.000 145.000
-200.0
0.000
200.0
400.0
600.0
800.0
1000.0
1200.0
1400.0
1600.0
1800.0
UG199_c7_27_071007
Time (ns)
Voltage (mV)
Probe 6:U3_B01.J1 (at die)