Status byte, Error/event queue (err), Questionable status register summary (qsr) – AMETEK XG Family Programmable DC User Manual

Page 164

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Remote

Operation

5-32

M370430-01 Rev E

Status Byte

The Status byte register contains the STB and RQS (MSS) messages as
defined in 488.1. You can read the status byte register using a 488.1
serial poll or the 488.2 *STB? common command.

The *STB? query causes the device to send the contents of the Status
Byte Register and the Master Summary Status (MSS) summary
message. The *STB? query does not alter the status byte, MSS, or RQS.

Table 5-10

Status Byte Summary Register

Bit

Bit
Weight
Bit Name

Description

0

1

Reserved

Reserved

1

2

Reserved

Reserved

2

4

Error/Event Queue (ERR)

Set if any errors are present in the Error/Event queue.

3

8

Questionable Status
Register (QSR)

Set if any bits are set in the Questionable Status Event
register.

4

16

Message Available
(MAV)

Indicates whether the output queue is empty. MAV is
TRUE if the device is ready to accept a request from the
controller.

5

32

Standard Event Status Bit
Summary (ESB)

A summary of the Standard Event Status Register.

6

64

Request Service (RQS) /
Master Status Summary

(MSS)

Not Implemented / MSS indicates that the device has at
least one reason for requesting service.

7

128

Operation Status Register
(OSR)

Present if a bit is set in the Operation status register.

Error/Event Queue (ERR)

This bit is TRUE if any errors are present in the Error/Event Queue.

Questionable Status Register Summary (QSR)

This bit is TRUE when a bit in the Questionable Event Status Register is
set and its corresponding bit in the Questionable Status Enable Register
is TRUE.

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