GAI-Tronics MRTI 2000 (No. PL1877A) Microprocessor Radio Telephone Interconnect Installation & Service Manual - Manual (Page 163)

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Theory of Operation
Power Supply
DC power enters the PL1877A via J2 and passes through fusible resistor R350. Common-mode choke
L201 acts to reduce the level of EMI/RFI out of the dc power port. C261 and C262 also work with the
choke to accomplish additional filtering. D226 provides reverse and overvoltage protection. C259, L202
and C260 provide high-frequency filtering from the switch-mode power supply.
C215, U206b and associated components regulate the −5 volt source, derived from the −14 volt supply.
Programmable zener U212 provides the 5 volt reference. The 2-volt reference voltage is obtained by
dividing the reference 5 volts in half by voltage divider R370 and R369, and buffered by U202d.
U211, Q211, T201 and associated components comprise a fly-back switch-mode power supply operating
at approximately 50 kHz. This supply furnishes the regulated 5 volts for analog and digital circuits, and
unregulated −14 volts. The 5 volt analog output is delayed “on” by Q217 and Q213 until the −5 volt
supply is present.
U234 and associated components provide an RS-232 compatible interface for programming system
parameters from the serial port of a terminal. U234a functions as a line receiver, while section “d” serves
as the line driver.
Microprocessor and DSP Module (MDP)
U1, a 68HC11 8-bit microcontroller, controls audio paths, provides timing, and regulates output levels.
The processor contains an internal power-up reset and computer operating properly (COP) watchdog
timer. In the event that an internal failure occurs, the reset output is asserted. This resets the DSP
controller.
DSP processor U10 handles the following: audio routing, tone detection, DTMF tone generation, receive
audio de-emphasis, VOX autolevel, and modem functions. Host and DSP processors generate an
operating clock internally by crystals Y2 and Y1 respectively. Operating parameters are stored in
NVRAM U3. U2 contains the operating program that runs the HOST processor. Communication
between the Host and DSP processors is via U5 and U6.