GAI-Tronics MRTI 2000 (No. PL1877A) Microprocessor Radio Telephone Interconnect Installation & Service Manual - Manual (Page 165)

PL1877A Microprocessor Radio Telephone Interconnect Theory of Operation
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Radio Interface
Receive audio from the station receiver, enters via P1-10 and passes through an attenuator consisting of
R221, R225 and R205, and R206. JU202 “IN” allows use of high-level audio sources, such as a line or
speaker level source. A 15 dB attenuator (Q201, 202, and 203) can be enabled on demand (parameter 2),
by the processor, as needed to give flexibility in acceptable receive levels. R220 serves as a termination
resistor (JU202 “IN”) to establish a 600-ohm input impedance.
With JU202 “OUT”, the input impedance is high, or bridging. Receive audio then is routed to the
microprocessor/DSP module via U206b. There it is digitized to a serial output by CODEC U20, to allow
processing by U10.
U207a, U207b, and associated components comprise an active high pass filter, extracting the noise
component from the detector but ignoring the speech audio. (Wide-band noise is always present from an
FM detector when no signal is present). The extracted noise, level set by VR201, is detected by D210
and U207c, which comprises a half-wave precision rectifier.
The dc output derived feeds comparator U207d, which outputs a logical high upon a reduction of high-
frequency noise (mobile carrier detected). The line is read by the microprocessor, being an input to the
SPI (serial peripheral interface) bus via U205, which then validates detection of a mobile transmission.
Reconstituted (analog), processed transmit audio enters line driver U210, functioning as a constant
current driver. This configuration allows the PL1877A to bridge the microphone input circuit, without
loading it. Q221, Q222, and Q223 function as an audio switch, muting the TX audio path in the receive
mode.
Logical inputs from the station (PTT sense, COR IN, PL sense, Patch Inhibit, and options), are selected
by U205. Then they are fed to the host processor via the SPI wire, under control of bus line MISO_D,
synchronized by serial clock.
All logical outputs to the station, TX PL disable, PTT, and MON are under control of the HOST
processor through serial to parallel data latch U204. U204 interfaces with the processor via the SPI bus.
The logical outputs then are directed to the appropriate driver as an output, synchronized by the SCK line
from the host processor.
A logic high on the PTT line turns on Q205, sinking its drain to ground, and providing the PTT to the
station transmitter. In a similar fashion, the MON (high) turns on Q206, or PL strip turns on Q207,
activating optical relays U208 and U209 respectively. This scheme provides a very high degree of
isolation, and assures flexible interfacing to various radios.