Altera 100G Development Kit, Stratix IV GT Edition - Manual (Page 22)

2–14 Chapter 2: Board Components
MAX II CPLD EPM2210 System Controller
100G Development Kit, Stratix IV GT Edition Reference Manual September 2010 Altera Corporation
U72.C7 FSM bus flash address Bidirectional FSM_A12 U44.AK6 U65.D6, U57.P8
U72.A5 FSM bus flash address Bidirectional FSM_A13 U44.Y6 U65.B7, U57.P9
U72.B5 FSM bus flash address Bidirectional FSM_A14 U44.AA6 U65.A7, U57.P10
U72.A4 FSM bus flash address Bidirectional FSM_A15 U44.AF6 U65.C7, U57.P11
U72.A6 FSM bus flash address Bidirectional FSM_A16 U44.AG6 U65.D7, U57.R2
U72.B3 FSM bus flash address Bidirectional FSM_A17 U44.AD14 U65.E7, U57.R3
U72.B11 FSM bus flash address Bidirectional FSM_A18 U44.AE14 U65.B3, U57.R4
U72.E8 FSM bus flash address Bidirectional FSM_A19 U44.AE6 U65.C4, U57.R8
U72.C8 FSM bus flash address Bidirectional FSM_A20 U44.AA7 U65.D5, U57.R9
U72.C11 FSM bus flash address Bidirectional FSM_A21 U44.AD7 U65.D4, U57.R10
U72.B8 FSM bus flash address Bidirectional FSM_A22 U44.AG7 U65.C5, U57.R11
U72.C4 FSM bus flash address Bidirectional FSM_A23 U44.AJ6 U65.B8, U57.B1
U72.B4 FSM bus flash address Bidirectional FSM_A24 U44.AH6 U65.C8, U57.A1
U72.A2 FSM bus flash address Bidirectional FSM_A25 U44.Y15 U65.F8, U57.B11
U72.B1 FSM bus flash address Bidirectional FSM_A26 U44.AA15 U65.G8
U72.E10 FSM bus flash data Bidirectional FSM_D0 U44.AP9 U65.E3, U57.J10
U72.A14 FSM bus flash data Bidirectional FSM_D1 U44.AR8 U65.H3, U57.J11
U72.F10 FSM bus flash data Bidirectional FSM_D2 U44.N6 U65.E4, U57.K10
U72.F11 FSM bus flash data Bidirectional FSM_D3 U44.P6 U65.H4, U57.K11
U72.C5 FSM bus flash data Bidirectional FSM_D4 U44.AV8 U65.H5, U57.L10
U72.D7 FSM bus flash data Bidirectional FSM_D5 U44.AV7 U65.E5, U57.L11
U72.F7 FSM bus flash data Bidirectional FSM_D6 U44.AV10 U65.H6, U57.M10
U72.C6 FSM bus flash data Bidirectional FSM_D7 U44.AU10 U65.E6, U57.M11
U72.D11 FSM bus flash data Bidirectional FSM_D8 U44.AW8 U65.F3, U57.D10
U72.B12 FSM bus flash data Bidirectional FSM_D9 U44.AW9 U65.G3, U57.D11
U72.F8 FSM bus flash data Bidirectional FSM_D10 U44.AU9 U65.F4, U57.E10
U72.E7 FSM bus flash data Bidirectional FSM_D11 U44.AU8 U65.G4, U57.E11
U72.D8 FSM bus flash data Bidirectional FSM_D12 U44.AR7 U65.F5, U57.F10
U72.D5 FSM bus flash data Bidirectional FSM_D13 U44.AT8 U65.G6, U57.F11
U72.D6 FSM bus flash data Bidirectional FSM_D14 U44.AT6 U65.F6, U57.G10
U72.E6 FSM bus flash data Bidirectional FSM_D15 U44.AT7 U65.G7, U57G11
U72.H13
FPGA initialization done LED.
Indicates that the FPGA is in user
mode
Output INIT_DONE_LED — D39.2
Table 2–5. MAX II CPLD EPM2210 System Controller Device Pin-Out (Part 3 of 6)
EPM2210
Pin Number
Description Type
Schematic Signal
Name
Stratix IV
GT Device
Pin Name
Other
Connections