Altera 100G Development Kit, Stratix IV GT Edition - Manual (Page 46)

2–38 Chapter 2: Board Components
Components and Interfaces
100G Development Kit, Stratix IV GT Edition Reference Manual September 2010 Altera Corporation
Table 2–28 lists the flash memory device component reference and manufacturing
information.
Components and Interfaces
This section describes the development board's communication ports, memory, and
interface cards relative to the Stratix IV GT device. The development board supports
the following components and interfaces:
■ Transceiver Interfaces
■ QSFP Interface
■ Small Form-Factor Pluggable (SFP+) Interface
■ CFP Interface
■ Interlaken Interface
■ External Memory
■ DDR3 Interface
■ QDR II Interface
■ Ethernet RGMII Interface
Transceiver Interfaces
The Stratix IV GT 100G development board includes four transceiver interfaces that
utilize 36 transceiver channels. There are four channels on the QSFP interface, 10
channels on the CFP interface, two channels on the SFP+, and 20 channels that make
up the Interlaken interface.
U57.A8 Address status controller SSRAM_ADSCn
2.5-V CMOS
— —
U57.B9 Address status processor SSRAM_ADSPn — —
U57.A9 Address valid SSRAM_ADVn — —
Table 2–27. SSRAM Pin-Out (Part 3 of 3)
Board
Reference
Description
Schematic
Signal Name
I/O Standard
Stratix IV GT
Device
Pin Name
Other Connections
Table 2–28. SSRAM Component References And The Manufacturing Information
Board
Reference
Description Manufacturer
Manufacturing
Part Number
Manufacturer
Website
U57
Standard synchronous pipelined
SCD, 512K × 36 bit, 250 MHz
Cypress CY7C1480V25-200BZC www.cypress.com