FUJITSU Implementation Supplement Fujitsu SPARC64 V User Manual

Page 101

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90

SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002

■

X1: The contents of the context field of the D-MMU Tag Access Register are
undefined after a

data_access_exception

.

■

X2:

I-SFSR

is updated according to its update policy described in Section F.10.9

■

X3:

D-SFSR

and

D-SFAR

are updated according to the update policy described

in Section F.10.9

The traps with Ref #1~8 in

TABLE F-2

conform to the specification defined in Section

F.5 of Commonality.

The additional traps (Ref #9 and #10) are described below.

Ref 9: instruction_access_error

— Signalled upon detection of at least one of the

following errors.

■

An uncorrectable error is detected upon an instruction fetch reference.

■

A bus error response from the UPA bus is detected upon an instruction fetch
reference.

■

mITLB (sITLB and fITLB) multiple hits are detected in a mITLB lookup for an
instruction reference.

■

An fITLB entry parity error is detected in an fTLB lookup for an instruction
reference.

Ref 10: data_access_error

— Signalled upon the detection of at least one of the

following errors.

■

An uncorrectable error is detected upon an instruction operand access.

■

A bus error response from the UPA bus is detected upon an operand access.

■

mDTLB (sDTLB and fDTLB) multiple hits are detected in an mDTLB lookup for
an operand access.

2.

instruction_access_exception

Several (see below)

X2

X

08

16

3.

fast_data_access_MMU_miss

D-TLB miss

X3

X

68

16

–6B

16

4.

data_access_exception

Several (see below)

X3

X1

30

16

5.

fast_data_access_protection

Protection violation

X3

X

6C

16

-6F

16

6.

privileged_action

Use of privileged ASI

X3

37

16

7.

watchpoint

Watchpoint hit

X3

61

16

–62

16

8.

mem_address_not_aligned

,

*_mem_address_not_aligned

Misaligned memory
operation

(impl.
dep
#237)

35

16

, 36

16

,

38

16

, 39

16

9.

instruction_access_error

Several (see below)

X2

0A

16

10

data_access_error

Several (see below)

X3

32

16

TABLE F-2

MMU Trap Types, Causes, and Stored State Register Update Policy

Registers Updated

(Stored State in MMU)

Ref #Trap Name

Trap Cause

I-SFSR

I-MMU
Tag
Access

D-SFSR,
SFAR

D-MMU
Tag
Access

Trap Type

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