Correctable error on extended upa data bus – FUJITSU Implementation Supplement Fujitsu SPARC64 V User Manual

Page 209

Advertising
background image

198

SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002

Raw (unmarked) uncorrectable error (multibit error)

Marked uncorrectable error

Correctable Error on Extended UPA Data Bus

When the SPARC64 V processor detects a correctable error in the extended UPA
incoming data, the processor corrects the data and uses it. The restrainable error

ASI_AFSR.CE_INCOMED

is indicated.

When the processor detects a correctable error in the outgoing data to the extended
UPA data bus before the data transfer occurs, it corrects the error and sends the
corrected data to the extended UPA data bus. If the correctable error is also detected
in the data in the U2 cache, the processor corrects the source data in the U2 cache,
too. The error is not reported to software.

Uncorrectable Error in Incoming Data from Extended UPA
Data Bus

At the time data is received, the SPARC64 V processor handles

UE

s in data coming

from the extended UPA data bus, as follows:

Marked

UE

in incoming data from the extended UPA data bus.

When the

processor detects a marked

UE

in such data, the processor transfers that data to

the destination register or cache without modification. The error is not reported to
software when the marked

UE

is received at the extended UPA data bus interface.

Raw

UE

in incoming data from the extended UPA data bus.

When the processor

detects a raw

UE

in such data, the processor applies error marking to that data.

The processor changes the data to marked

UE

with

ERROR_MARK_ID

= 0,

indicating a memory system error, and then transfers the marked

UE

data to the

destination register or cache.

If the error marking is applied to incoming cacheable data, the restrainable error

ASI_AFSR.UE_RAW_L2$FILL

is indicated. If the error marking is applied to incoming

noncacheable data, the error is not reported to software at the time of error
marking.

Note –

The destination register or cache always receives the marked

UE

data for

both marked

UE

and raw

UE

in the data sent via the extended UPA data bus, as

described above.

Finally, the treatment of an uncorrectable error (

UE

) coming from the extended UPA

bus depends on whether the access was to cacheable or noncacheable data and
whether the access was an instruction fetch, load, or store instruction, as follows:

Advertising