FUJITSU Implementation Supplement Fujitsu SPARC64 V - Manual (Page 59)

48 SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002
4. The block store with commit instruction always stores the operand in main
storage and invalidates the line in the L1D cache if it is present. The invalidation
is performed through an
S_INV_REQ transaction through UPA by the system
controller.
5. The block store instruction stores the operand into main storage if it is not present
in the operand cache and the status of the line is invalid, shared, or owned. In
case the line is not present in the L1D cache and is exclusive or modified on the
L2 cache, the block store instruction modifies only the line in L2 cache. If the line
is present in the operand cache and the status is either clean/shared or clean/
owned, the line is stored in main storage. If the line is present in the operand
cache and the status is clean/exclusive, the line in the operand cache is
invalidated and the operand is stored in the L2 cache. If the line is in the operand
cache and the status is modified/modified, the operand is stored in the operand
cache. The following table summarizes each cache status before block store and
the results of the block store. Blank cells mean that no action occurred in the
corresponding cache or memory, and the data, if it exists, is unchanged.
Exceptions fp_disabled
PA_watchpoint
VA_watchpoint
illegal_instruction (misaligned rd)
mem_address_not_aligned
(see Block Load and Store ASIs on page 120)
data_access_exception (see Block Load and Store ASIs on page 120)
LDDF_mem_address_not_aligned (see Block Load and Store ASIs on page 120)
data_access_error
fast_data_access_MMU_miss
fast_data_access_protection
Storage Status
Cache status
before bst
L1 Invalid Valid
L2 E, M I, S, O E M S, O
Action
L1 — — invalidate — —
L2 update — update update S
Memory — update — — update