Q.2.5 upa event counters, Upa event counters 210, Inv receive count (sreq_bi_count) – FUJITSU Implementation Supplement Fujitsu SPARC64 V User Manual

Page 221: Cpi receive count (sreq_cpi_count), Cpb receive count (sreq_cpb_count), Cpd receive count (sreq_cpd_count), Upa address bus busy cycle (upa_abus_busy), Upa data bus busy cycle (upa_data_busy)

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210

SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002

Q.2.5

UPA Event Counters

UPA event counters count the number of

S_REQ_

xxx requests received by a CPU in

a given time.

INV Receive Count (sreq_bi_count)

Counts the number of

S_INV_REQ

packets received.

CPI Receive Count (sreq_cpi_count)

Counts the number of

S_CPI_REQ

packets received.

CPB Receive Count (sreq_cpb_count)

Counts the number of

S_CPB_REQ

packets received.

CPD Receive Count (sreq_cpd_count)

Counts the number of

S_CPD_REQ

packets received.

UPA Address Bus Busy Cycle (upa_abus_busy)

Counts the number of bus-busy cycles of the UPA address bus, in units of UPA
bus clocks, not in units of CPU clocks.

UPA Data Bus Busy Cycle (upa_data_busy)

Counts the number of bus-busy cycles of the UPA data bus, in units of UPA bus
clocks, not in units of CPU clocks.

Counter

picu0

Encoding

110001

2

Counter

picl0

Encoding

110001

2

Counter

picu1

Encoding

110001

2

Counter

picl1

Encoding

110001

2

Counter

picu2

Encoding

110001

2

Counter

picl2

Encoding

110001

2

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