FUJITSU Implementation Supplement Fujitsu SPARC64 V - Manual (Page 78)

Release 1.0, 1 July 2002 F. Chapter B IEEE Std 754-1985 Requirements for SPARC V9 67
TABLE B-6 describes how SPARC64 V behaves when FSR.NS = 1 (nonstandard mode).
TABLE B-6 Nonarithmetic Operations Under FSR.NS = 1
Operations op1= denorm
op2=
denorm
UFM NXM DVM NVM Result
FsTOd — Yes — 1 — — NX
0 — — nx, a signed zero
FdTOs — Yes 1 — — — UF
0 1 — — NX
0 — — uf + nx, a signed zero
FADDs ,
FSUBs ,
FADDd ,
FSUBd
Yes No
—
1 — — NX
0 — — nx, op2
No Yes 1 — — NX
0 — — nx, op1
Yes Yes 1 — — NX
0 — — nx, a signed zero
FMULs ,
FMULd ,
FsMULd
Yes —
—
1 — — NX
0 — — nx, a signed zero
— Yes 1 — — NX
0 nx, a signed zero
FDIVs ,
FDIVd
Yes No
—
1 — — NX
0 — — nx, a signed zero
No Yes — 1 — DZ
— 0 — dz, a signed infinity
Yes Yes — — 1 NV
— — 0 nv, dNaN
1
1. A single precision dNaN is 7FFF.FFFF
16,
and a double precision dNaN is 7FFF.FFFF.FFFF.FFFF
16
.
FSQRTs ,
FSQRTd —
Yes and op2
> 0
—
1 — — NX
0 — — nx, zero
Yes and op2
< 0 — — 1 NV
— — 0 nv, dNaN