Instruction definitions: sparc64 v extensions – FUJITSU Implementation Supplement Fujitsu SPARC64 V User Manual
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F. A P P E N D I X
45
A
Instruction Definitions:
SPARC64 V Extensions
This appendix describes the SPARC64 V-specific implementation of the instructions
in Appendix A of Commonality. If an instruction is not described in this appendix,
then no SPARC64 V implementation-dependency applies.
■
See
TABLE A-1
of Commonality for the location at which general information about
the instruction can be found.
■
Section numbers refer to the parallel section numbers in Appendix A of
Commonality
.
lists four instructions that are unique to SPARC64 V.
Each instruction definition consists of these parts:
1. A table of the opcodes defined in the subsection with the values of the field(s)
that uniquely identify the instruction(s).
2. An illustration of the applicable instruction format(s). In these illustrations a dash
(—) indicates that the field is reserved for future versions of the architecture and
shall be 0 in any instance of the instruction. If a conforming SPARC V9
implementation encounters nonzero values in these fields, its behavior is
undefined.
3. A list of the suggested assembly language syntax, as described in Appendix G,
TABLE A-1
Implementation-Specific Instructions
Operation
Name
Page
V9 Ext?
FMADD
(
s
,
d
)
Floating-point multiply add
✓
FMSUB
(
s
,
d
)
Floating-point multiply subtract
✓
FNMADD
(
s
,
d
)
Floating-point multiply negate add
✓
FNMSUB
(
s
,
d
)
Floating-point multiply negate subtract
✓