Panasonic MN101C77C - Manual (Page 157)

IV - 7
Chapter 4 I/O Ports
Port 0
4-2-2 Registers
Figure 4-2-1 Port 0 Registers
0 1 2 4 5 6 7 3
P0OUT P0OUT6 - P0OUT5 P0OUT4 P0OUT3 P0OUT2 P0OUT1 P0OUT0
0
1
L(V SS level)
Output data
H(V DD level)
P0OUT
0 1 2 4 5 6 7 3
P0IN ( At reset : - X X X X X X X )
( At reset : - 0 0 0 0 0 0 0 )
( At reset : - 0 0 0 0 0 0 0 )
( At reset : - 0 0 0 0 0 0 0 )
P0IN6 - P0IN5 P0IN4 P0IN3 P0IN2 P0IN1 P0IN0
0
1
Pin is low(V SS level).
Input data
Pin is high(V DD level).
P0IN
0 1 2 4 5 6 7 3
P0DIR P0DIR6 - P0DIR5 P0DIR4 P0DIR3 P0DIR2 P0DIR1 P0DIR0
0
1
Input mode
I/O mode selection
Output mode
P0DIR
0 1 2 4 5 6 7 3
P0PLU P0PLU6 - P0PLU5 P0PLU4 P0PLU3 P0PLU2 P0PLU1 P0PLU0
0
1
No pull-up resistor
Pull-up resistor selection
Pull-up resistor
P0PLU
Port 0 output register (P0OUT : x'03F10', R/W)
Port 0 input register (P0IN : x'03F20', R)
Port 0 direction control register (P0DIR : x'03F30', R/W)
Port 0 pull-up resistor control register (P0PLU : x'03F40', R/W)