Panasonic MN101C77C User Manual
Page 403
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Chapter 12 Serial Interface 3
Operation
XII - 17
Figure 12-3-9 Reception Timing (Falling edge, Disable Start Condition)
Figure 12-3-8 Reception Timing (Falling edge, Enable Start Condition)
T
Clock
(SBT3 pin)
Input data
(SBI3 pin)
SC3BSY
Interrupt
(SC3IRQ)
Transfer bit counter
1
0
2
3
4
5
6
7
(Write data to SC3TRB)
at master
Tmax=1.5 T
T
Clock
(SBT3 pin)
Input data
(SBI3 pin)
SC3BSY
Interrupt
(SC3IRQ)
Transfer bit counter
1
0
2
3
4
5
6
7
(Write data to SC3TRB)
at master
Tmax=2.5 T
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