Panasonic MN101C77C - Manual (Page 477)

Chapter 15 A/D Converter
Overview XV - 3
15-1-2 Block Diagram
Figure 15-1-1 A/D Converter Block Diagram
MUX
MUX
A/D conversion data
upper 8 bits
A/D conversion data
lower 2 bits
Sample and
hold
A/D conversion
control
External
interrupt control
AN0
AN1
AN2
AN3
AN4
AN5
AN6
V REF -
fs/2
fs/4
fs/8
fx
×
2
V REF +
ANCHS0
ANCHS1
ANCHS2
-
-
-
-
-
ANBUF10
ANBUF11
ANBUF12
ANBUF13
ANBUF14
ANBUF15
ANBUF16
ANBUF17
ANBUF06
ANBUF07
ANST
MUX
1/18
3
2 2
10 bits A/D
comparator
ANCTR1 ANCTR2
IRQ3(P23)
ANBUF1 ANBUF0
0
7
-
-
-
ANLADE
ANCK0
ANCK1
ANSH0
ANSH1
ANCTR0
0
7
0
7
0
7
0
7
-
-
-
-
-
ANSTSEL
-
-
-
-
-
-
-
1/6
1/2