Panasonic MN101C77C - Manual (Page 159)

IV - 9
Chapter 4 I/O Ports
Port 0
R
D
L
Q
Reset
Write Read
R
D
L
Q
Reset
Write Read
D
L
Q
Write Read
Read
R
Reset
Pull-up resistor control
I/O direction control
Port output data
SC0MD1 register
SC0SBOS flag
Serial interface 0 transmission data output
Port input data
Data bus
0
1
P03
P0PLU3
P0DIR3
P0OUT3
P0IN3
M
X
U
R
D
L
Q
Write Read
SC0ODC0
Reset
Nch open-drain control
UART transmission data output
Figure 4-2-4 Block diagram (P02)
Figure 4-2-5 Block diagram (P03)
R
D
L
Q
Reset
Write Read
R
D
L
Q
Reset
Write Read
D
L
Q
Write Read
Read
R
Reset
Pull-up resistor control
I/O direction control
Port output data
SC1MD1 register
SC1SBTS flag
Serial interface 1 clock output
Serial interface 4 clock output
Serial interface 1 clock input
Serial interface 4 clock input
Port input data
Data bus
0
1
P02
P0PLU2
P0DIR2
P0OUT2
P0IN2
SC4AD1 register
SELI2C flag
M
U
X
Read
R
D
L
Q
Reset
Write
SC4ODC01
Nch open-drain control