Panasonic MN101C77C - Manual (Page 232)

Chapter 6 8-bit Timers
VI - 18 8-bit Timer Count
(7) Set the TM0IE flag of the TM0ICR register to
"1" to enable the interrupt.
(8) Set the TM0EN flag of the TM0MD register to
"1" to start the timer 0.
Setup Procedure
(7) Enable the interrupt.
TM0ICR (x'3FE9')
bp1 :TM0IE = 1
(8) Start the timer operation.
TM0MD (x'3F54')
bp3 :TM0EN = 1
Description
The TM0BC starts to count up from 'x00'. When the TM0BC reaches the setting value of the TM0OC
register, the timer 0 interrupt request flag is set at the next count clock, then the value of the TM0BC
becomes x'00' and restart to count up.
When the TMnEN flag of the TMnMD register is changed at the same time to other bit, binary
counter may start to count up by the switching operation.
If fx is selected as the count clock source, when the binary counter is read at operation,
uncertain value on counting up may be read. To prevent this, select the synchronous fx as
the count clock source.
In this case the timer n counter counts up in synchronization with system clock, therefore the
correct value is always read.
But, if the synchronous fx is selected as the count clock source, CPU mode cannot return
from STOP/HALT mode.