Xvii - 8 – Panasonic MN101C77C User Manual

Page 508

Advertising
background image

Chapter 17 Appendices

XVII - 8

Special Function Registers List

X'3F36'

X'3F37'

P7DIR

X'3F38'

P8DIR

X'3F3C'

PAIMD

X'3F3E'

P6IMD

X'3F40'

P0PLU

X'3F41'

P1PLU

X'3F42'

P2PLU

Address

Register

P6DIR

Port 6 Key Input Interrupt Pin Setup

X'3F45'

P5PLU

X'3F46'

P6PLU

X'3F47'

P7PLUD

X'3F48'

P8PLU

X'3F4A'

PAPLUD

Bit Symbol /Initial Value /Description

Port 7 I/O Direction Control

Port 8 I/O Direction Control

Port A Analog Input Selection

Port 6 I/O Direction Control

Port 0 Pull-up Control

Port 6 Pull-up Control

Port 7 Pull-up/Pull-down Control

Port 8 Pull-up Control

Port A Pull-up/Pull-down Control

X'3F4D'

DLYCTR

Bit 7

P7DIR7

P8DIR7

P6DIR7

-

IRQ4SEL

IRQ4 Interrupt

Source

Selection

-

-

-

-

P6PLU7

P7PLUD7

P8PLU7

-

BUZOE

Buzzer Output

Enable

Bit 6

P7DIR6

P8DIR6

P6DIR6

PAIMD6

-

P0PLU6

-

-

P6PLU6

P7PLUD6

P8PLU6

PAPLUD6

-

BUZS2

Bit 5

P7DIR5

P8DIR5

P6DIR5

PAIMD5

-

P0PLU5

-

-

P6PLU5

P7PLUD5

P8PLU5

PAPLUD5

-

BUZS1

Buzzer Output Frequency Selection

Bit 4

P7DIR4

P8DIR4

P6DIR4

PAIMD4

-

P0PLU4

P1PLU4

P2PLU4

P6PLU4

P7PLUD4

P8PLU4

PAPLUD4

P5PLU4

BUZS0

Bit 3

P7DIR3

P8DIR3

P6DIR3

PAIMD3

P6KYEN4

P0PLU3

P1PLU3

P2PLU3

P6PLU3

P7PLUD3

P8PLU3

PAPLUD3

P5PLU3

DLYS2

Bit 2

P7DIR2

P8DIR2

P6DIR2

PAIMD2

P6KYEN3

P0PLU2

P1PLU2

Port 1 Pull-up Control

P2PLU2

Port 2 Pull-up Control

P6PLU2

P7PLUD2

P8PLU2

PAPLUD2

P5PLU2

Port 5 Pull-up Control

DLYS1

Osscillation Stabilization

Wait Time Selection

Bit 1

P7DIR1

P8DIR1

P6DIR1

PAIMD1

P6KYEN2

P0PLU1

P1PLU1

P2PLU1

P6PLU1

P7PLUD1

P8PLU1

PAPLUD1

P5PLU1

DLYS0

P7DIR0

P8DIR0

P6DIR0

PAIMD0

P6KYEN1

P0PLU0

P1PLU0

P2PLU0

P6PLU0

P7PLUD0

P8PLU0

PAPLUD0

P5PLU0

-

IV - 31

IV - 38

IV - 43

III - 46

IV - 7

IV - 13

IV - 18

Page

IV - 27

IV - 22

IV - 27

IV - 31

IV - 38

IV - 42

II - 41

X - 3

X'3F3A'

PADIR

Port A I/O Direction Control

-

PADIR6

PADIR5

PADIR4

PADIR3

PADIR2

PADIR1

PADIR0

IV - 42

Bit 0

X'3F51'

X'3F52'

TM1BC7

TM1BC6

TM1BC5

TM1BC4

TM1BC3

TM1BC2

TM1BC1

TM1BC0

TM1BC

Timer 1 Binary Counter

VI - 9

TM0OC7

TM0OC6

TM0OC5

TM0OC4

TM0OC3

TM0OC2

TM0OC1

TM0OC0

TM0OC

Timer 0 Output Compare Register

VI - 8

X'3F50'

TM0BC7

TM0BC6

TM0BC5

TM0BC4

TM0BC3

TM0BC2

TM0BC1

TM0BC0

TM0BC

Timer 0 Binary Counter

VI - 9

Advertising
This manual is related to the following products: