Ii - 11, Table 2-1-4 addressing modes – Panasonic MN101C77C User Manual

Page 63

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II - 11

Chapter 2 CPU Basics

Overview

Table 2-1-4 Addressing Modes

Addressing mode

Effective address

Explanation

Register direct

Immediate

Register indirect

Register relative
indirect

(d7, PC)

(d8, An)

(An)

imm4/imm8
imm16

Dn/DWn
An/SP
PSW

0

0

0

0 H

(d16, An)

(branch instructions only)

An

An+d8

An+d16

PC+d7

Directly specifies the register. Only internal
registers can be specified.

Directly specifies the operand or mask
value appended to the instruction code.

Specifies the address using an address
register.

Specifies the address using an address
register with 8-bit displacement.

Specifies the address using an address
register with 16-bit displacement.

Specifies the address using the program
counter with 7-bit displacement and H bit.

17

15

15

15

(d4, PC)

(branch instructions only)

(d16, PC)

(branch instructions only)

Stack relative
indirect

(d4, SP)

(d8, SP)

Specifies the address using the program
counter with 4-bit displacement and H bit.

Specifies the address using the program
counter with 16-bit displacement and H bit.

0 H

PC+d4

17

0 H

PC+d16

17

0

SP+d4

15

0

SP+d8

15

Specifies the address using the stack
pointer with 4-bit displacement.

Specifies the address using the stack
pointer with 8-bit displacement.

Absolute

Handy

(abs16)

0

abs16

Specifies the address using the operand
value appended to the instruction code.
Optimum operand length can be used to
specify the address.

15

Reuses the last memory address accessed
and is only available with the MOV and
MOVW instructions. Combined use with
absolute addressing reduces code size.

0

abs12

11

0

abs8

7

(abs12)

(abs8)

I/O short

Specifies an 8-bit offset from the top address
(x'03F00') of the special function register area.

0

IOTOP+io8

15

(io8)

(HA)

(d16, SP)

0

SP+d16

15

Specifies the address using the stack
pointer with 16-bit displacement.

(abs18)

0 H

abs18

17

(branch instructions only)

(d11, PC)

0 H

(branch instructions only)

PC+d11

Specifies the address using the program
counter with 11-bit displacement and H bit.

17

(d12, PC)

0 H

(branch instructions only)

PC+d12

Specifies the address using the program
counter with 12-bit displacement and H bit.

17

RAM short

(abs8)

0

abs8

7

Specifies an 8-bit offset from the address
x'00000'.

* 1

* 1

* 1

* 1

* 1

* 1

* 1

H: half-byte bit

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