Panasonic MN101C77C - Manual (Page 442)

Chapter 14 Automatic Transfer Controller
XIV - 4 Overview
14-1-3 Block Diagram
„ ATC1 Block Diagram
Figure 14-1-1 ATC1 Block Diagram
ATC1 Trigger Factor s
DMA Transfer State Control
TM7 Capture Trigger
Software Start
TM7IRQ TM1IRQ SC4IRQ
ADIRQ
SC3IRQ
SC1TIRQ
IRQ3 IRQ2 IRQ1 IRQ0
IRQ0IR (IRQ0IR Interrupt Request Flag)
BGRNT (Bus Release Confirmation Signal)
DMA Start Request
4
4
AT1IR0 AT1IR1 AT1IR2 AT1IR3 BTSTP
- - -
AT1CNT1
Synchronization
Calculator
DEC
BREQ(Bus Release Request Signal)
Internal Data Bus
LDDMA(DMA Load Request Signal) STDMA(DMA Store Request Signal) ATC1IRQ
0
AT1EN Reserved AT1MD0 AT1MD1 AT1MD2 AT1MD3 AT1ACT FMODE AT1CNT0
0
7
7
AT1MAP0
(H)
AT1MAP0
(M)
AT1MAP0
(L)
AT1MAP1
(H)
AT1MAP1
(M)
AT1MAP1
(L)
Transfer Data Store Register
AT1TRC
Internal Address Bus
SC0TIRQ