Panasonic MN101C77C User Manual
Page 397
Chapter 12 Serial Interface 3
Operation
XII - 11
First Transfer Bit Setup
The first bit to be transferred can be set by the SC3DIR flag of the SC3MD0 register. MSB first or LSB
first can be selected.
Transmit /Receive Data Buffer
Data register for transmission/reception is common. That is the transmit/receive shift register SC3TRB.
The transmission data should be set to SC3TRB. The transfer clock outputs data by 1 bit in shift. The
received data is stored to SC3TRB by 1 bit in shift.
Transfer Bit Count and First Transfer Bit
At transmission, when the transfer bit count is 1 to 7 bits, data storage way to the transmit/receive shift
register SC3TRB depends on the first transfer bit selection. When MSB is the first bit to be transferred,
use the upper bits of SC3TRB for storage. In figure 12-3-1-1, if data "A" to "F" are stored to bp2 to bp7 of
SC3TRB as the transfer bit count is 6 bits, data is transferred from "F" to "A". When LSB is the first bit to
be transferred, use the lower bits of SC3TRB for storage. In figure 12-3-1-2, if data "A" to "F" are stored to
bp0 to bp5 of SC3TRB, as the transfer bit count is 6 bits, data is transferred from "A" to "F".
Figure 12-3-1-2 Transfer Bit Count and First Transfer Bit (at LSB first)
Figure 12-3-1-1 Transfer Bit Count and First Transfer Bit (at MSB first)
0
1
2
4
3
SC3TRB
C
D
A
B
E
5
6
7
F
0
1
2
4
3
SC3TRB
5
6
7
C
D
A
B
E
F
Receive Bit Count and First Transfer Bit
At reception, when the transfer bit count is 1 to 7 bits, data storage way to the transmit/receive shift
register SC3TRB depends on the first transfer bit selection. When MSB is the first bit to be transferred,
the lower bits of SC3TRB are used for storage. In figure 12-3-1-3, as the transfer bit count is 6 bits, data "A"
to "F" are stored to bp0 to bp5 of SC3TRB, and they are transferred from "F" to "A". When LSB is the first
bit to be transferred, use the upper bits of SC3TRB for storage. In figure 12-3-1-4, data "A" to "F" are stored
to bp2 to bp7 of SC3TRB, as the transfer bit count is 6 bits, and they are transferred from "A" to "F".
Figure 12-3-1-3 Receive Bit Count and First Transfer Bit (at MSB first)
Figure 12-3-1-4 Receive Bit Count and First Transfer Bit (at LSB first)
0
1
2
4
3
SC3TRB
5
6
7
C
D
A
B
E
F
0
1
2
4
3
SC3TRB
5
6
7
C
D
A
B
E
F