Panasonic MN101C77C - Manual (Page 241)

VI - 27
Chapter 6 8-bit Timers
8-bit PWM Output
„ Count Timing of PWM Output (when the compare register is x'00') (Timers 0, 4 and 5)
Here is the count timing when the compare register is set to x'00' ;
Figure 6-6-3 Count Timing of PWM Output (when compare register is x'FF')
Figure 6-6-2 Count Timing of PWM Output (when compare register is x'00')
„ Count Timing of PWM Output (when the compare register is x'FF') (Timers 0, 4 and 5)
Here is the count timing when the compare register is set to x'FF' ;
00
N+1 N+2 FE FF
Count clock
TMnEN
flag
Compare
register
Binary
counter
00 01 N+1 N-1 N 00 01 N-1 N
TMnIO output
(PWM output)
H
L
FF
N+1 N+2 FE FF
Count
clock
TMnEN
flag
Compare
register
Binary
counter
00 01 N+1 N-1 N 00 01 N-1 N
TMnIO output
(PWM output)
When TMnEN flag is stopped ("0") PWM output is "H".